tetl-docs/hardware__interference__size_8hpp_source.html

// SPDX-License-Identifier: BSL-1.0


#ifndef TETL_NEW_HARDWARE_INTERFERENCE_SIZE_HPP

#define TETL_NEW_HARDWARE_INTERFERENCE_SIZE_HPP


#include <etl/_cstddef/max_align_t.hpp>


#if defined(__aarch64__)

    #define TETL_CACHELINE_SIZE 64

#elif defined(__ARM_ARCH_5T__)

    #define TETL_CACHELINE_SIZE 32

#elif defined(__ARM_ARCH_7A__)

    #define TETL_CACHELINE_SIZE 64

#elif defined(__PPC64__)

    #define TETL_CACHELINE_SIZE 128

#elif defined(__i386__) || defined(__x86_64__)

    #define TETL_CACHELINE_SIZE 64

#else

    #define TETL_CACHELINE_SIZE alignof(max_align_t)

#endif


namespace etl {


constexpr auto hardware_constructive_interference_size = TETL_CACHELINE_SIZE;


constexpr auto hardware_destructive_interference_size = TETL_CACHELINE_SIZE;


} // namespace etl


#endif // TETL_NEW_HARDWARE_INTERFERENCE_SIZE_HPP

TETL_CACHELINE_SIZE
#define TETL_CACHELINE_SIZE
Cache line sizes for ARM values are not strictly correct since cache line sizes depend on implementat...
Definition hardware_interference_size.hpp:22

max_align_t.hpp

etl
Definition adjacent_find.hpp:8

etl::hardware_constructive_interference_size
constexpr auto hardware_constructive_interference_size
Minimum offset between two objects to avoid false sharing. Guaranteed to be at least alignof(max_alig...
Definition hardware_interference_size.hpp:29

etl::hardware_destructive_interference_size
constexpr auto hardware_destructive_interference_size
Maximum size of contiguous memory to promote true sharing. Guaranteed to be at least alignof(max_alig...
Definition hardware_interference_size.hpp:33