hardware_interference_size.hpp File Reference

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Namespaces
namespace	etl

Macros
#define	TETL_CACHELINE_SIZE   alignof(max_align_t)
	Cache line sizes for ARM values are not strictly correct since cache line sizes depend on implementations, not architectures. There are even implementations with cache line sizes configurable at boot time.

Variables
constexpr auto	hardware_constructive_interference_size = TETL_CACHELINE_SIZE
	Minimum offset between two objects to avoid false sharing. Guaranteed to be at least alignof(max_align_t).
constexpr auto	hardware_destructive_interference_size = TETL_CACHELINE_SIZE
	Maximum size of contiguous memory to promote true sharing. Guaranteed to be at least alignof(max_align_t).

Macro Definition Documentation

TETL_CACHELINE_SIZE

#define TETL_CACHELINE_SIZE   alignof(max_align_t)

Cache line sizes for ARM values are not strictly correct since cache line sizes depend on implementations, not architectures. There are even implementations with cache line sizes configurable at boot time.